Question is ⇒ The sum S of A and B in a Half Adder can be implemented by using K NAND gates. The value of K is, Options are ⇒ (A) 3, (B) 4, (C) 5, (D) none of these, (E) , Leave your comments or Download question paper.

Question is ⇒ The sum S of A and B in a Half Adder can be implemented by using K NAND gates. The value of K is, Options are ⇒ (A) 3, (B) 4, (C) 5, (D) none of these, (E) , Leave your comments or Download question paper. Previous question Next question


Q1.	The sum S of A and B in a Half Adder can be implemented by using K NAND gates. The value of K is
A.	3 [Wrong Answer]
B.	4 [Correct Answer]
C.	5 [Wrong Answer]
D.	none of these [Wrong Answer]
View Answer 1 -1 Explanation:- Answer : B Discuss it below : !! OOPS Login [Click here] is required to post your answer/result Help other students, write article, leave your comments

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