1. DPSK demodulator requires a device which operates at carrier frequency and provides a delay of bit time T_b
2. In DPSK, synchronous demodulation recovers the signal b(t) and the decoding of b(t) to generate d(t) is done at base band
3. In both DPSK and DEPSK errors always occur in pairs

1. Open collector output
2. Totem pole output
3. Tristate output

Assertion (A): In a power divider S_H = 0, S₂₁ = 0.707 = S₃,

Reason (R): In a power divider the input port (i.e., port 1) is matched and incident power is equally divided in output ports 2 and 3

Assertion (A): The reverse saturation current in a semiconductor diode is 4nA at 20°C and 32 nA at 50°C.

Reason (R): The reverse saturation current in a semiconductor diode doubles for every 10°C rise in temperature.