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Q1. | In an RLC series circuit having finite values of RLC, the phase difference between applied voltage and current is |

A. | always 0° [Wrong Answer] |

B. | between 0 and 180° [Wrong Answer] |

C. | between 0 and 90° [Wrong Answer] |

D. | always 90° [Correct Answer] |

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Explanation:-
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**Also Read Similar Questions Below :**

⇒ The inputs A, B, C of the given figure are applied to a 3 input NOR gate. The outpu

HIGH from 4 to 0

LOW from 0 to 4

HIGH from 0 to 1 and LOW from 1 to 4

LOW from 0 to 2 and HIGH from 2 to 4

⇒ In amplitude modulation, the magnitude of side bands is

*ma*/2 times the carrier amplitude, E

_{c}

*ma*times the carrier amplitude, E

_{c}

2

*ma*times the carrier amplitude, E

_{c}

4

*ma*times the carrier amplitude, E

_{c}

⇒ At absolute temperature

the forbidden energy gap in germanium is higher than that in silicon

the forbidden energy gap in germanium and silicon are equal

the forbidden energy gap in silicon is higher than that in germanium

none of the above

⇒ For an ideal transformer

only Y parameter exist

only Z parameter

Z, Y both exist

neither Z parameter nor Y parameter exist

⇒ The sensitivity of human eyes is maximum at

white portion of spectrum

green portion of spectrum

red portion of spectrum

violet portion of spectrum

⇒ As regards dielectric constant

*ε*

_{r}the units are farads/m

the units are newton/coulomb

it is dimensionless

the units are farads

⇒ In the given figure, the combinations of two non touching loop

1

2

3

4

⇒ The numerical value of directive gain may lie between

1 and + 1

0 and 1

0 and ∞

1 and ∞

⇒ A sinusoidal voltage is written as

*v*= I

_{m}(R

^{2}+ X

_{C}

^{2})

^{0.5}sin 314

*t*. Its peak value and frequency are

I

_{m}and 50

I

_{m}(R

_{2}+ X

^{2}

_{C})

^{0.5}and 50

0.707 I

_{m}(R

_{2}+ X

^{2}

_{C})

^{0.5}and 50

2 I

_{m}(R

_{2}+ X

^{2}

_{C})

^{0.5}and 50

⇒ The integral of unit step function is a ramp of slope unity.

TRUE

FALSE

⇒ The DTFT of

*x*(

*n*) = δ(

*n*) will be

1

0

∞

not defined

⇒ For the K map in the given figure, the simplified expressio

*x*

_{l}

*x*

_{2}

*x*

_{4}+

*x*

_{2}

*x*

_{4}+

*x*

_{1}

*x*

_{3}

*x*

_{2}

*x*

_{4}+

*x*

_{2}

*x*

_{4}+

*x*

_{1}

*x*

_{3}

*x*

_{1}

*x*

_{2}

*x*

_{4}+

*x*

_{l}

*x*

_{2}+

*x*

_{3}

*x*

_{4}+

*x*

_{2}

*x*

_{4}

*x*

_{1}

*x*

_{2}+

*x*

_{2}

*x*

_{3}+

*x*

_{3}

*x*

_{4}

⇒ One eV = 1.602 x 10

^{-19}joules.

TRUE

FALSE

⇒ Which of the following statement about JFET is correct?

In an N-channel JFET, the channel is the narrowest under zero gate bias condition

In a JFET the gates are always forward biased

In a JFET, gate-source cut off voltage is numerically equal to the pinch off voltage

It is a voltage controlled device

⇒ The symbol in figure is

DIAC

P-N junction diode

Schottky diode

None of the above

⇒ Electromagnetic cavity resonators (energy storage devices) are used in

wave meters

bandpass filters

high frequency tubes

all of the above

⇒ Which rectifier has the best ratio of rectification?

Half wave rectifier

Full wave rectifier

Bridge rectifier

Three phase full wave rectifier

⇒ A pulsed radar produces 1 μ sec pulses at a rate of 1000 per second. The duty cycle is

0.001

0.01

0.1

1

⇒ The following table gives some Laplace transforms and the functions

f(t) | F(s) | |

1. | δ(t) | s |

2. | u(t) | 1/s |

3. | tu(t) | 2/s^{2} |

4. | t^{2}u(t) | 2s^{3} |

2 and 4

1 and 4

2 and 4

1 and 2

⇒ Power factor of the following circuit will be unity

inductance

capacitance

resistance

both (a) and (b)

⇒ When negative feedback is used the fractional changes in closed loop gain are desensitized by the factor (1 + A

_{v}β)

TRUE

FALSE

⇒ An intrinsic silicon sample has 2 million free electrons. The number of holes in the sample is

2 million

almost zero

more than 2 million

less than 2 million

⇒

Match the following:

List I (Digital circuit) | List II (Circuit type) | ||
---|---|---|---|

A. | BCD to 7 segment decoder | 1. | sequential circuit |

B. | 4-to-1 MUX | 2. | combinational circuit |

C. | 4 bit shift register | 3. | neither sequential nor combinational circuit |

A-2, B-1, C-2, D-1

A-3, B-2, C-1, D-3

A-2, B-2, C-1, D-1

A-3, B-1, C-2, D-3

⇒ A series circuit has fixed resistance and variable reactance. The impedance locus will be a straight line parallel to Y-axis.

TRUE

FALSE

⇒ The following graph, the number of trees (P) and the number of cut-sets (Q)

P = 2, Q = 2

P = 2, Q = 6

P = 4, Q = 6

P = 4, Q = 10

⇒ The complement of exclusive OR function is

AB + A B

AB + A B

A B + A

AB + A B

⇒ Which of the following flip flops cannot be converted to D flip flop?

JK

SR

Master slave

None of the above

⇒ Which of the following are applications of position control systems?

Control of sheet and metal thickness in hot rolling mill

Missile guidance of ships

Radar tracking system

All of the above

⇒ Which of the following statement is incorrect?

Z

_{0}is an ac characteristic that is the same for any length of time

The characteristic impedance can be measured approximately with a sensitive ohm meter

A line terminated in its Z

_{0}is a flat or non-resonant line

A twin lead has higher Z

_{0}but lower losses than coaxial cable

⇒ The four types of integers in Java are called

byte, short, int and long

bit, byte, short and long

nibble, byte, short and long

nibble, byte, int and long