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Consider the following statements about Yagi Uda antenna
| |
A. | 1 and 2 only [Wrong Answer] |
B. | 1, 2, 4 only [Correct Answer] |
C. | 1, 2, 3, 4 [Wrong Answer] |
D. | 1 and 4 only [Wrong Answer] |
View Answer
Explanation:-
Answer : B Discuss it below : !! OOPS Login [Click here] is required to post your answer/result |
Also Read Similar Questions Below :
⇒ The memory segment registers in 8086 are denoted by
AS, BS, CS, DS
BS, CS, SS, ES
CS, DS, SS, ES
DS, ES, FS, SS
⇒ The total lumens emitted by a source of 1 candle are
0.4 p
4 p
2 p
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⇒ A system has 12 poles or 2 zeros. Its high frequency asymptote in its magnitude plot has slope of
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-240 dB/decade
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⇒ Computers 'Basic input output system' is generally stored in RAM chips.
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⇒ In 8421 Binary coded Decimal system the decimal number 237 is represented by
1000110111
1000111110
1000110111
10010010011
⇒ In a parallel inverter
each thyristor is turned on twice during each cycle
each thyristor is turned on once during each cycle
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⇒ A p matching network for coupling the transmitter output of the antenna is shown in figu
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⇒ The memory segment registers in 8086 are denoted by
AS, BS, CS, DS
BS, CS, SS, ES
CS, DS, SS, ES
DS, ES, FS, SS
⇒ The total lumens emitted by a source of 1 candle are
0.4 p
4 p
2 p
8 p
⇒ A system has 12 poles or 2 zeros. Its high frequency asymptote in its magnitude plot has slope of
-200 dB/decade
-240 dB/decade
-280 dB/decade
-320 dB/decade
⇒ Computers 'Basic input output system' is generally stored in RAM chips.
TRUE
FALSE
⇒ In 8421 Binary coded Decimal system the decimal number 237 is represented by
1000110111
1000111110
1000110111
10010010011
⇒ In a parallel inverter
each thyristor is turned on twice during each cycle
each thyristor is turned on once during each cycle
each thyristor is turned on either once or twice in each load cycle
each thyristor may be turned on upto four times in each load cycle
⇒ A p matching network for coupling the transmitter output of the antenna is shown in figu
minimum D.C. plate current
maximum D.C. plate current
maximum RF antenna current
specified value of the D.C. plate current
⇒ The number of leads in a power semiconductor diode are
2
3
4
2 or 3
⇒ An amplifier has a large ac input signal. The clipping occurs on both the peaks. The output voltage will be nearly a
sine wave
square wave
triangular wave
(a) or (c)
⇒ A magnet does not attract
nickel
iron
copper
iron and copper
⇒ The problem of current lagging is associated with
DCTL gates
DTL gates
ECL gates
CMOS gates
⇒ ISDN stands for
Integrated Services Digital Network
Inter Services Digital Network
Inter Subscriber Digital Network
integrated Subscriber Digital Network
⇒ A pulse transformer uses
ferrite core
air core
iron core
copper core
⇒ If x_{k} = a^{k} and k &l
TRUE
FALSE
⇒ In figure, the switch is closed at t = 0. After some time i = 6A and rate of change of current was 4A/s. The value of inducto
1 H
1.5 H
indeterminate
0.5 H
⇒ Most of the amplification of the received signal is obtained in a superheterodyne receiver from the
IF stage
RF stage
power amplification stage
none of the above
⇒ In which material do conduction and valence bands overlap
insulators
conductors
both conductor and semiconductor
semiconductors
⇒ Two port circuits are connected in parallel. To determine the response, it is more convenient to use
O.C. impedance parameters
S.C. admittance parameters
ABCD parameters
h parameters
⇒ In the given figure,
(A + B)C + DE
AB + C(D + E)
(A + B)C + D + E
none of the above
⇒ Vestigial sideband is most commonly used in
radio transmission
television transmission
telephony
all of the above
⇒ A function Z(s) has zero at infinity if
the degree of numerator and denominator are equal
the numerator of Z(s) is one degree higher than denominator
the denominator of Z(s) is one degree higher than numerator
the degree of numerator and denominator are either equal or differ by one
⇒ The number of comparator circuits required to build a three-bit simultaneous A/D converter is
7
8
15
16
⇒ In figure, i(t) is a unit step current. The steady state value of v(t
2 V
3 V
6 V
9 V
⇒ Shifting digits from left to right and vice versa is needed in
storing numbers
arithmetic operations
counting
storing and counting
⇒ Which one of the following statements is correct for MOSFETS?
p channel MOS is easier to produce than n channel MOS
n channel MOS must have twice the area of p channel MOS for the same ON resistance
p channel MOS has faster switching action than n channel MOS
p channel MOS has higher packing density than n channel MOS
⇒ The log magnitude for the system in the given figure is (where T =
20 log (1 + ωT)
-20 log (1 + ωT)
-10 log (1 + ω^{2}T^{2})
-20 log (1 + ω^{2}T^{2})
⇒
Match the following:
List I | List II | ||
---|---|---|---|
A. | lag compensation | 1. | Exterior of unit circle |z| = 1 |
B. | lead compensation | 2. | PD control |
C. | stability | 3. | Non-minimum phase |
D. | Instability | 4. | Left half s plane |
5. | PI control |
A-2, B-5, C-1, D-3
A-3, B-1, C-2, D-5
A-1, B-2, C-3, D-4
A-5, B-2, C-4, D-1
⇒ In PM, without any modulation, all the transmitted pulses have the same
amplitude
width
amplitude and spacing
amplitude, spacing and width
⇒ In a JK master slave flip flop
master is clocked when clock is low
slave is clocked when clock is high
master is clocked when clock is high and slave is clocked when clock is low
master is clocked when clock is low and slave is clocked when clock is high
⇒ If a zero is added to a second order underdamped system
the peak overshoot is increased
the peak overshoot is decreased
the peak overshoot remains unchanged
either (a) or (b)