1. The detector reads zero when phases of input signal and reference signal are different.
2. The detector acts as a linear rectifier.
3. The detector can be used as vector voltmeter.

Assertion (A): An instruction cycle consists of fetch and execute cycles.

Reason (R): Fetch cycle has one machine cycle but execute cycle may have one or more machine cycles depending on length of instruction.

1. Open collector output
2. Totem pole output
3. Tristate output

Assertion (A): Klystron amplifiers use one or more intermediate cavities in addition to buncher and catcher cavity.

Reason (R): When one or more intermediate cavities are used the bandwidth can be increased.