Users Also Read

MCQ's Search Engine

Electrical Engineering

Mechanical Engineering

Civil Engineering

Automobile Engineering

Chemical Engineering

Computer Engineering

Electronics Engineering

Medical Science Engg

Q1. | A full adder can be made out of |

A. | two half adders [Wrong Answer] |

B. | two half adders and a OR gate [Correct Answer] |

C. | two half adders and a NOT gate [Wrong Answer] |

D. | three half adders [Wrong Answer] |

View Answer
Explanation:-
Answer : BDiscuss it below :!! OOPS Login [Click here] is required to post your answer/resultHelp other students, write article, leave your comments |

**Also Read Similar Questions Below :**

⇒ If the open-loop transfer function is a ratio of a numerator polynomial of degree '

*m*' and a denominator polynomial of degree '

*n*', then the integer (

*n*-

*m*) represents the number of:

breakaway points

unstable poles

separate root loci

asymptotes

⇒ If V = 100 ∠ 16°, the (V) is

10 ∠ 32°

10 ∠ 8°

10 ∠ 16°

10 ∠ 4°

⇒ Which op-amp circuit uses a diode as one of the circuit components?

Integrating amplifier

Differentiating amplifier

Logarithmic amplifier

Summing amplifier

⇒ In a 3 phase full wave regulator feeding resistance load connected in star, the possible range of firing angle a is

0 ≤ a ≤ 180°

0 ≤ a ≤ 150°

0 ≤ a ≤ 120°

0 ≤ a ≤ 90°

⇒ One of the advantages of base modulation over collector modulation of a transistor class C amplifier is

improved efficiency

better linearity

high power output per transistor

the lower modulating power requirement

⇒ A super heterodyne receiver has an input circuit tuned to a 570 KHz signal. If the intermediate frequency of the amplifier is tuned to 455 KHz. The quality factor Q for a Image Rejection ratio of 125?

100

56.81

42.74

87

⇒ Assume that only

*x*and

*y*logic inputs are available. What is the minimum number of 2-input NAND gates required to implement

*x*⊕

*y*?

2

3

4

5

⇒ In 8085 microprocessor, what is the length of status Word?

6 bits

8 bits

12 bits

16 bits

⇒ VLF is generally used for

telegraphy

satellite communication

instrument landing system

all of the above

⇒ Epitaxial growth is used in IC

_{s}

because it produces low parasitic capacitance

because it yields back to back isolating

*pn*Junction

to grow single crystal

*n*doped silicon on a single crystal P-type substrate

to grow Selectivity single crystal P doped silicon of one resistivity on a P type substrate of a different resistivity

⇒ Find R

_{L}for maximum power tran

3 Ω

1.125 Ω

4.17 Ω

none

⇒ The ground waves eventually disappear as one moves away from the transmitter because of

tilting

maximum single-hop distance limitation

interference from the sky waves

loss of line-of sight condition

⇒ A dc power supply has no load voltage of 30 V and full load voltage of 25 V at full load current of 1 A. The output resistance and voltage regulation respectively are

5 Ω and 25%

25 Ω and 20%

5 Ω and 16.7%

25 Ω and 16.7%

⇒ If temperature increases by about 50°, the resistance of thermistor changes to

half of its initial value

twice of its initial value

eight times of its initial value

one eight of its initial value

⇒ For Ergodic Process

ensemble Average equal to time Average

ensemble Average is not equal to time Average

ensemble Average > Time Average

ensemble Average < Time Average

⇒ A 6 MHz channel is used by a digital signalling system initializing four-level signals. The maximum possible transmission rate is

6M bands/s

12M bands/s

6 M bits/s

12M bits/s

⇒ Which of the following codes provides parity checks?

CCITT-2

EBCDIC

ASCII

Baudot

⇒ Consider the following statements about expressing real constants in exponential form in C

- The mantissa and exponent are separated either by e or E.
- The mantissa and exponent may have positive or negative sign.
- Default sign of mantissa is positive.
- Default sign of exponent is negative.

1 only

1 and 4 only

1, 3 and 4 only

4 only

⇒ If a two-port network is reciprocal as well as symmetrical, which one of the following relationships is correct?

Z

_{12}= Z

_{21}and Z

_{11}= Z

_{22}

Y

_{12}- Y

_{21}and Y

_{11}- Y

_{22}

AD - BC = 1 and A = D

all of the above

⇒ When a normal atom loses an electron

the atom loses one-proton simultaneously

rest of the electrons move faster

the atom becomes a positive ion

the atom becomes a negative ion

⇒

**Assertion (A):** In an intrinsic semiconductor J = (μ_{n} x μ_{p})*en*_{i}.

**Reason (R):** Intrinsic charge concentration *n*_{i} at temperature T is given by *n*_{i}^{2} = A_{0} T^{3} *e*^{-EG0/kT}.

Both A and R are true and R is correct explanation of A

Both A and R are true but R is not correct explanation of A

A is true but R is false

A is false but R is true

⇒ The slope of log magnitude curve changes by - 40 dB/decade at a certain frequency and the error between asymptote and actual curve is positive. This means that

a double pole is present

a pair of complex conjugate poles is present

either (a) or (b)

neither (a) nor (b)

⇒ If the output current wave shape of class C circuit has a period of 1 μs and a pulse width of 0.006 μs, the duty cycle is

0.06

0.006

0.00006

0.0006

⇒ (100101)

_{2}is

(37)

_{10}

(69)

_{10}

(41)

_{10}

(5)

_{10}

⇒ As per Shannon-Hartley theorem, a noise less Gaussian channel has

zero capacity

infinite capacity

small capacity

none of the above

⇒ A five bit binary adder is used to add 01001 and 00111. The adders from LSB position are numbered as FA

_{0}, FA

_{1}, FA

_{2}and FA

_{3}. The outputs of FA

_{2}are

SUM = 0

SUM = 0, CARRY = 1

SUM = 1, CARRY = 0

SUM = 1, CARRY = 1

⇒ N circles for a = a

_{1}, and a = a

_{1}± 180°

*n*(where

*n*= 1, 2, 3, ....) are the same.

TRUE

FALSE

⇒ In the synthesis of RLC network

the number of elements in Bott-Duffin synthesis and Brune's synthesis are always equal

the number of elements in Bott-Duffin synthesis is more than that in Brune's synthesis

the number of elements in Bott-Duffin synthesis is less than that in Brune's synthesis

the number of elements in Bott-Duffin synthesis may be more or less than that in Brune's synthesis

⇒ The minimum number of comparators required to build an 8 bit flash ADC is

8

63

255

256

⇒ The voltage applied to an R-L circuit at

*t*= 0 when switch is closed is 100 cos (100

*t*+ 30°). The circuit resistance is 80 Ω and inductance is 0.6 H (in which initial current is zero). What is the maximum amplitude of current flowing through the circuit?

0.0416666666666667

0.0833333333333333

0.208333333333333

0.416666666666667